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IBM Floating Point Architecture : ウィキペディア英語版
IBM Floating Point Architecture
IBM System/360 computers, and subsequent machines based on that architecture (mainframes), support a hexadecimal floating-point format.〔(''IBM System/360 Principles of Operation'' ), IBM Publication A22-6821-6, Seventh Edition (January 13, 1967), pp.41-50〕〔(''IBM System/370 Principles of Operation'' ), IBM Publication GA22-7000-4, Fifth Edition (September 1, 1975), pp.157-170〕〔(''z/Architecture Principles of Operation'' ), IBM Publication SA22-7832-01, Second Edition (October, 2001), chapter 9 ff.〕
In comparison to IEEE 754 floating-point, the IBM floating-point format has a longer significand, and a shorter exponent. All IBM floating-point formats have 7 bits of exponent with a bias of 64. The normalized range of representable numbers is from 16−65 to 1663 (approx. 5.39761 × 10−79 to 7.237005 × 1075).
The number is represented as the following formula: (−1)sign × 0.significand × 16exponent−64.
== Single-precision 32-bit ==
A single-precision binary floating-point number is stored in a 32-bit word:
:
Note that in this format the initial bit is not suppressed, and the
radix point is set to the left of the mantissa in increments of 4 bits.
Since the base is 16, the exponent in this form is about twice as large as the equivalent in IEEE 754, in order to have similar exponent range in binary, 9 exponent bits would be required.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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